Trench-gated MOSFETs have achieved wide acceptance because of their superior on-resistance characteristics. Because the current flow is primarily in a vertical direction, through a channel located adjacent a side wall of the trench, it is possible to obtain a higher cell packing density than is the case with MOSFETs having a significant horizontal current flow. This allows a greater flow of current per unit of area of the semiconductor chip. Thus the on-resistance characteristics of trench-gated MOSFETs are generally superior to those of, for example, planar double-diffused MOSFETs.
One problem, however, that has occurred with trench MOSFETs relates to the capacitance that exists between the gate and the drain. This problem is illustrated in FIG. 1, which is a cross-sectional view of a conventional trench MOSFET 10 formed in a semiconductor chip 12. A trench 14 is etched in chip 12, and is filled with a polysilicon gate 16. An insulating layer 18, typically oxide, lines the walls of trench 14 and insulates the gate 16 from chip 12. Chip 12 includes an N− drain region 20, a P-body region 22 and an N+ source region 24. Current flows between N+ source region 24 and N− drain region 20 through a channel region indicated by the dashed lines. The gate-drain capacitance develops in the area designated 26, where N− drain region 20 is separated from gate 16 by oxide layer 18. As indicated, area 26 is created by the fact that trench 14 extends into, i.e., overlaps, the N− drain region 20. This overlap has both a vertical component along the side walls of trench 14 and a horizontal component along the bottom of trench 14.
The presence of a sizeable gate-drain capacitance limits the speed at which MOSFET 10 can be operated. This effect has become more problematical as the device size has decreased and the speed (frequency) has become greater.
One possible solution to this problem is illustrated in FIG. 2, which shows a MOSFET 30 having many similar components (which are like-numbered) to those shown in MOSFET 10. In contrast, oxide layer 18 in MOSFET 30 includes a thick gate oxide portion 18A at the bottom of trench 14. Thick gate oxide portion 18A limits the capacitance between gate 16 and N− drain region 20. Since an accumulation region does not form under thick gate oxide portion 18A, the on-resistance of MOSFET 30 is somewhat greater than it would be if the bottom gate oxide were thin. Moreover, the bottom junction of P-body region 22 must be aligned properly with the top of thick gate oxide portion 18A. If, for example, thick gate oxide portion 18A extends sufficiently upward to the extent that it overlaps P-body region 22, the device cannot be turned on.
Thus a definite need exists for a technique for reducing the gate-drain capacitance of a MOSFET without sacrificing on-resistance.